ESP8266 ILI9341 display support code with printf sources, wire-frame viewer and custom fonts  1.0
ESP8266ILI9341DisplayProject
uart.c
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1 
24 #include "user_config.h"
25 
26 #include "uart.h"
27 #include "uart_register.h"
28 
29 #ifdef TELNET_SERIAL
30  extern queue_t *bridge_send_queue;
31  extern queue_t *bridge_receive_queue;
32 #endif
33 
34 #define UARTS 2
35 #ifdef UART_QUEUED
36  #ifdef UART_QUEUED_TX
37  queue_t *uart_txq[UARTS] = { NULL, NULL };
38  #endif
39  #ifdef UART_QUEUED_RX
40  queue_t *uart_rxq[UARTS] = { NULL, NULL };
41  #endif
42 #endif
44 
45 // =================================================================
46 // @brief low level UART functions
52 void uart_rx_enable(uint8 uart_no)
53 {
55 }
56 
62 void uart_rx_disable(uint8 uart_no)
63 {
64  CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA);
65 }
66 
72 void uart_tx_enable(uint8_t uart_no)
73 {
74  SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_TXFIFO_EMPTY_INT_ENA);
75 }
76 
82 void uart_tx_disable(uint8_t uart_no)
83 {
84  CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_TXFIFO_EMPTY_INT_ENA);
85 }
86 
87 // =================================================================
88 
94 void tx_fifo_flush(int uart_no)
95 {
96  SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TXFIFO_RST);
97  CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_TXFIFO_RST);
98 }
99 
105 void rx_fifo_flush(int uart_no)
106 {
107  SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
108  CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
109 }
110 
111 // =================================================================
117 MEMSPACE
118 int tx_fifo_used(int uart_no)
119 {
120  int used = (READ_PERI_REG(UART_STATUS(uart_no))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT;
121  return(used);
122 }
123 
129 MEMSPACE
130 int tx_fifo_free(int uart_no)
131 {
132  int used = (READ_PERI_REG(UART_STATUS(uart_no))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT;
133  int free = UART_FIFO_LEN - used;
134  return(free);
135 }
136 
142 MEMSPACE
143 int tx_fifo_empty(int uart_no)
144 {
145  int used = (READ_PERI_REG(UART_STATUS(uart_no))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT;
146  return( used ? 0 : 1);
147 }
148 
154 MEMSPACE
155 int rx_fifo_used(int uart_no)
156 {
157  // number of characters in fifo
158  int used = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
159  return(used);
160 }
161 
167 MEMSPACE
168 int rx_fifo_free(int uart_no)
169 {
170  // number of characters in fifo
171  int used = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
172  int free = UART_FIFO_LEN - used;
173  return(used);
174 }
175 
181 MEMSPACE
182 int rx_fifo_empty(int uart_no)
183 {
184  // number of characters in fifo
185  int used = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
186  return( used ? 0 : 1);
187 }
188 
189 // =================================================================
190 
198 MEMSPACE
199 int tx_fifo_putb(int uart_no, uint8_t c)
200 {
201  if(tx_fifo_free(uart_no) )
202  {
203  WRITE_PERI_REG(UART_FIFO(uart_no), c);
204  uart_tx_enable(uart_no);
205  return(c);
206  }
207  return(-1);
208 }
209 
216 MEMSPACE
217 int rx_fifo_getb(int uart_no)
218 {
219  if( rx_fifo_used(uart_no) )
220  return (READ_PERI_REG(UART_FIFO(UART0)) & 0xFF);
221  return(-1);
222 }
223 
224 // =================================================================
236 MEMSPACE
237 int tx_fifo_write(int uart_no, uint8_t *buf, int size)
238 {
239  uint8_t tmp;
240  int sent = 0;
241  while(size && tx_fifo_free(uart_no))
242  {
243  tmp = *buf++;
244  WRITE_PERI_REG(UART_FIFO(uart_no) , tmp);
245  ++sent;
246  --size;
247  }
248  // FIXME
249  uart_tx_enable(uart_no);
250  return(sent);
251 }
252 
263 MEMSPACE
264 int rx_fifo_read(int uart_no, uint8_t *buf, int size)
265 {
266  uint8_t tmp;
267  int read = 0;
268  while(size && rx_fifo_used(uart_no) )
269  {
270  tmp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
271  *buf++ = tmp;
272  ++read;
273  --size;
274  }
275  return(read);
276 }
277 
278 // =================================================================
280 
288 LOCAL MEMSPACE
289 int uart_putb(uint8 uart_no, uint8 data)
290 {
291 //FIXME verify free before call to tx_free_putc
292  while( !tx_fifo_free(uart_no) )
293  optimistic_yield(1000);
294  return( tx_fifo_putb(uart_no, data) );
295 }
296 
303 LOCAL MEMSPACE
304 int uart_getb(int uart_no)
305 {
306  uint8_t c;
307 //FIXME verify empty before call to rx_free_getc
308  while( rx_fifo_empty(uart_no) )
309  optimistic_yield(1000);
310  c = rx_fifo_getb(uart_no);
311  return (c);
312 }
313 
314 // =================================================================
322 MEMSPACE
323 int uart_putc(uint8 uart_no, char c)
324 {
325  if (c == '\r')
326  uart_putb(uart_no, '\n');
327  return( uart_putb(uart_no, c) );
328 }
329 
336 MEMSPACE
337 int uart_getc(int uart_no)
338 {
339  uint8_t c;
340  while(1)
341  {
342  optimistic_yield(1000);
343  c = uart_getb(uart_no);
344  if(c == '\n')
345  continue;
346  break;
347  }
348  return (c);
349 }
350 // =================================================================
357 MEMSPACE
358 int uart0_putc(uint8 c)
359 {
360  return( uart_putc(0,c) );
361 }
362 
368 MEMSPACE
370 {
371  return( uart_getc(0) );
372 }
373 
374 // =================================================================
381 MEMSPACE
382 int uart1_putc(uint8 c)
383 {
384  return( uart_putc(1,c) );
385 }
386 
392 MEMSPACE
394 {
395  return( uart_getc(1) );
396 }
397 
398 // =================================================================
399 
405 MEMSPACE
406 void uart_flush(uint8_t uart_no)
407 {
408 #ifdef UART_QUEUED_TX
409  while(!queue_empty(uart_txq[uart_no]) && tx_fifo_used(uart_no))
410  ;
411 #else
412  while(tx_fifo_used(uart_no))
413  ;
414 #endif
415 }
416 
417 // =================================================================
418 #ifdef UART_QUEUED
419 
421 
422 
423 #ifdef UART_QUEUED_RX
424 
430 LOCAL MEMSPACE
431 int uart_queue_getb(uint8_t uart_no)
432 {
433  uint8_t c;
434  while(queue_empty(uart_rxq[uart_no]))
435  optimistic_yield(1000);
436  c = queue_popc(uart_rxq[uart_no]);
437  return (c);
438 }
445 MEMSPACE
447 {
448  uint8_t c;
449  while(1)
450  {
451  c = uart_queue_getb(uart_no);
452  if(c == '\r')
453  continue;
454  break;
455  }
456  return (c);
457 }
458 
465 MEMSPACE
467 {
468  uint8_t data = uart_queue_getc(0);
469 }
470 
471 
478 MEMSPACE
480 {
481  return(uart_queue_getc(1) );
482 }
483 #endif
484 
485 #ifdef UART_QUEUED_TX
486 #ifdef UART_TASK
487 
490 void uart_task(void)
491 {
492  uint8_t data;
493  if(tx_fifo_empty(0) )
494  {
495  if(!queue_empty(uart_txq[0]) )
496  {
497  data = queue_popc(uart_txq[0]);
498  WRITE_PERI_REG(UART_FIFO(0), data);
499  uart_tx_enable(0);
500  }
501  }
502 }
503 #endif
504 
511 LOCAL MEMSPACE
512 void uart_queue_putb(uint8 uart_no, uint8 data)
513 {
514  // enable transmit queue to empty existing data
515  // uart_tx_enable(uart_no);
516  while(queue_full(uart_txq[uart_no]))
517  optimistic_yield(1000);
518  queue_pushc(uart_txq[uart_no], data);
519  // enable transmit queue to empty new data
520  uart_tx_enable(uart_no);
521 }
522 
523 
524 // =================================================================
532 MEMSPACE
533 void uart_queue_putc(uint8_t uart_no, char c)
534 {
535  if (c == '\r')
536  uart_queue_putb(uart_no, '\n');
537  uart_queue_putb(uart_no, c);
538 }
539 
546 MEMSPACE
547 void uart0_queue_putc(char c)
548 {
549  uart_queue_putc(0,c);
550 }
551 
558 MEMSPACE
559 void uart1_queue_putc(char c)
560 {
561  uart_queue_putc(1,c);
562 }
563 #endif
564 
565 #endif
566 
572 int kbhiteol(int uart_no)
573 {
574  if(uart_rxq[uart_no]->flags & QUEUE_EOL )
575  return(1);
576  if(!queue_empty(uart_rxq[uart_no]) )
577  return(1);
578  return(0);
579 }
585 int kbhit(int uart_no)
586 {
587  if(!queue_empty(uart_rxq[uart_no]) )
588  return(1);
589  return(0);
590 }
591 
592 
593 // =================================================================
681 
713 
772 
821 
#define UART_INT_ENA(i)
Definition: uart_register.h:54
LOCAL MEMSPACE int uart_getb(int uart_no)
Read a byte from a uart Note: This function waits/blocks util the read can happen.
Definition: uart.c:304
void uart_tx_disable(uint8_t uart_no)
Disable transmit interrupts for a uart.
Definition: uart.c:82
MEMSPACE void uart1_queue_putc(char c)
Master include file for project Includes all project includes and defines here.
#define UART_FIFO_LEN
Definition: uart.h:65
#define UART_TXFIFO_CNT_S
Definition: uart_register.h:90
size_t queue_full(queue_t *q)
Is the ring buffer full ?
Definition: queue.c:140
MEMSPACE int rx_fifo_read(int uart_no, uint8_t *buf, int size)
Read a data buffer from the receive fifo Note: This function does not wait/block util there is enough...
Definition: uart.c:264
MEMSPACE int tx_fifo_write(int uart_no, uint8_t *buf, int size)
Write a data buffer to the transmit fifo Note: This function does not wait/block util there is enough...
Definition: uart.c:237
MEMSPACE void uart_queue_putc(uint8_t uart_no, char c)
#define UART_TXFIFO_CNT
Definition: uart_register.h:89
int queue_pushc(queue_t *q, uint8_t c)
Add a byte to the ring buffer Note: This function does not wait/block util there is enough free space...
Definition: queue.c:216
int kbhiteol(int uart_no)
Has an EOL been read on stdin ?
Definition: uart.c:572
#define QUEUE_EOL
Definition: queue.h:33
MEMSPACE int uart_getc(int uart_no)
Read a byte from a uart with NL to CR/NL conversion Note: This function waits/blocks util the read ca...
Definition: uart.c:337
void rx_fifo_flush(int uart_no)
Flush receive fifo for a uart.
Definition: uart.c:105
MEMSPACE void uart0_queue_putc(char c)
MEMSPACE uint8_t uart1_queue_getc(void)
MEMSPACE int rx_fifo_getb(int uart_no)
Remove a byte from the receive fifo We assume that rx_fifo_used() was called!
Definition: uart.c:217
MEMSPACE int tx_fifo_used(int uart_no)
Get the number of bytes used in transmit fifo.
Definition: uart.c:118
MEMSPACE int rx_fifo_used(int uart_no)
Get the number of bytes used in receive fifo.
Definition: uart.c:155
MEMSPACE int uart1_putc(uint8 c)
Write a byte to uart1 with NL to CR/NL conversion Note: This function waits/blocks util the write can...
Definition: uart.c:382
int uart_debug_port
Definition: uart.c:43
#define UART_RXFIFO_RST
void optimistic_yield(uint32_t interval_us)
Definition: user_task.c:102
MEMSPACE int tx_fifo_free(int uart_no)
Get the number of bytes free in transmit fifo.
Definition: uart.c:130
#define UART_TXFIFO_EMPTY_INT_ENA
Definition: uart_register.h:62
#define NULL
Definition: cpu.h:55
int queue_popc(queue_t *q)
Remove a byte from the ring buffer Note: This function does not wait/block util there is data to meet...
Definition: queue.c:244
MEMSPACE int rx_fifo_free(int uart_no)
Get the number of bytes free in receive fifo.
Definition: uart.c:168
queue structure
Definition: queue.h:36
#define UART_RXFIFO_FULL_INT_ENA
Definition: uart_register.h:63
#define UART_RXFIFO_TOUT_INT_ENA
Definition: uart_register.h:55
MEMSPACE ssize_t read(int fd, const void *buf, size_t count)
POSIX read count bytes from *buf to fileno fd.
Definition: posix.c:1006
MEMSPACE void free(void *p)
Free buffer POSIX function We only call os_free() is pointer is not null.
Definition: system.c:87
#define UARTS
Definition: uart.c:34
size_t queue_empty(queue_t *q)
Is the ring buffer empty ?
Definition: queue.c:114
MEMSPACE uint8_t uart0_queue_getc(void)
MEMSPACE int uart_putc(uint8 uart_no, char c)
Write a byte from a uart with NL to CR/NL conversion Note: This function waits/blocks util the write ...
Definition: uart.c:323
LOCAL MEMSPACE int uart_queue_getb(uint8_t uart_no)
#define UART_RXFIFO_CNT
Definition: uart_register.h:94
MEMSPACE int uart1_getc()
Read a byte from uart1 with NL to CR/NL conversion Note: This function waits/blocks util the read can...
Definition: uart.c:393
void uart_rx_enable(uint8 uart_no)
Enable receive interrupts for a uart.
Definition: uart.c:52
LOCAL MEMSPACE int uart_putb(uint8 uart_no, uint8 data)
Polled Blocking I/O functions that poll.
Definition: uart.c:289
#define UART_RXFIFO_CNT_S
Definition: uart_register.h:95
#define UART_CONF0(i)
Definition: uart_register.h:97
#define MEMSPACE
Definition: cpu.h:25
MEMSPACE int rx_fifo_empty(int uart_no)
Test if the receive fifo is empty.
Definition: uart.c:182
#define UART0
Definition: uart.h:29
MEMSPACE int tx_fifo_empty(int uart_no)
Test if the transmit fifo is empty.
Definition: uart.c:143
void uart_task(void)
void uart_rx_disable(uint8 uart_no)
Disable receive interrupts for a uart.
Definition: uart.c:62
#define UART_FIFO(i)
Definition: uart_register.h:28
#define UART_TXFIFO_RST
MEMSPACE int tx_fifo_putb(int uart_no, uint8_t c)
Add a byte to the trasmit fifo We assume that tx_fifo_free() was called!
Definition: uart.c:199
int kbhit(int uart_no)
Has ANY character been read in stdin.
Definition: uart.c:585
void uart_tx_enable(uint8_t uart_no)
Enable transmit interrupts for a uart.
Definition: uart.c:72
unsigned char uint8_t
Definition: send.c:17
void tx_fifo_flush(int uart_no)
Flush transmit fifo for a uart.
Definition: uart.c:94
MEMSPACE void uart_flush(uint8_t uart_no)
Flush TX buffer Note: This function waits/blocks util the write happen.
Definition: uart.c:406
LOCAL MEMSPACE void uart_queue_putb(uint8 uart_no, uint8 data)
MEMSPACE int uart0_putc(uint8 c)
Write a byte to uart0 with NL to CR/NL conversion Note: This function waits/blocks util the write can...
Definition: uart.c:358
MEMSPACE uint8_t uart_queue_getc(uint8_t uart_no)
#define UART_STATUS(i)
Definition: uart_register.h:85
MEMSPACE int uart0_getc()
Read a byte from uart0 with NL to CR/NL conversion Note: This function waits/blocks util the read can...
Definition: uart.c:369