hspi.c

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#include "user_config.h"

#include <stdint.h>
#include <stdarg.h>
#include <string.h>
#include <math.h>

#include "hspi.h"
#include "gpio.h"

// @brief HSPI Prescale value - You should set this in your Makefile
#ifndef HSPI_PRESCALER
#define HSPI_PRESCALER 16
#endif


static _hspi_init_done = 0;

uint32_t hspi_clock = -1;
void hspi_init(uint32_t prescale, int hwcs)
{

// FIXME DEBUG 
#if 1
    // We only make changes if the speed actually changes
    if(prescale == hspi_clock)
        return;
#endif

    // If we have been called make sure all spi transactions have finished before 
    // we change anything

    if(_hspi_init_done)
        hspi_waitReady();
    
    /* eagle_soc.h does not define MISO,MOSI,CLK and CS */
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);    // HSPIQ MISO GPIO12
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);    // HSPID MOSI GPIO13
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);    // CLK        GPIO14

    // HARDWARE SPI CS
    if(hwcs)
        PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); // CS AUTOMATIC ONLY ON GPIO15

    if(prescale == 0)
    {
        WRITE_PERI_REG(PERIPHS_IO_MUX, 0x305); //set bit9
        WRITE_PERI_REG(SPI_FLASH_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);
    }
    else
    {
        // prescale >= 1
        WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105);        //clear bit9
        WRITE_PERI_REG(SPI_FLASH_CLOCK(HSPI),
        (((prescale - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) |
        ((1 & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
        ((0 & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
        ((1 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S));
    }

    WRITE_PERI_REG(SPI_FLASH_CTRL1(HSPI), 0);
    hspi_clock = prescale;
    _hspi_init_done = 1;
}

static void hspi_config(int configState)
{
    uint32_t valueOfRegisters = 0;

    hspi_waitReady();

    if (configState == CONFIG_FOR_TX)
    {
        valueOfRegisters |=  SPI_FLASH_DOUT;
//clear bit 2 see example IoT_Demo
        valueOfRegisters &= \
            ~(BIT2 | SPI_FLASH_USR_ADDR | SPI_FLASH_USR_DUMMY | \
            SPI_FLASH_USR_DIN | SPI_USR_COMMAND | SPI_DOUTDIN);
    }
    else if  (configState == CONFIG_FOR_RX_TX)
    {
        valueOfRegisters |=  SPI_FLASH_DOUT | SPI_DOUTDIN | SPI_CK_I_EDGE;
//clear bit 2 see example IoT_Demo
        valueOfRegisters &= \
            ~(BIT2 | SPI_FLASH_USR_ADDR | SPI_FLASH_USR_DUMMY | \
            SPI_FLASH_USR_DIN | SPI_USR_COMMAND);
    }
    else
    {
        return;                                   // Error
    }
    WRITE_PERI_REG(SPI_FLASH_USER(HSPI), valueOfRegisters);

}


// Only called from hspi_writeFIFO or hspi_readFIFO
// So bounds testing has already been done
static void hspi_setBits(uint16_t bytes)
{
    uint16_t bits = (bytes << 3) - 1;
    WRITE_PERI_REG(SPI_FLASH_USER1(HSPI),
        ( (bits & SPI_USR_OUT_BITLEN) << SPI_USR_OUT_BITLEN_S ) |
        ( (bits & SPI_USR_DIN_BITLEN) << SPI_USR_DIN_BITLEN_S ) );
}


static void hspi_startSend(void)
{
    SET_PERI_REG_MASK(SPI_FLASH_CMD(HSPI), SPI_FLASH_USR);
}


void hspi_waitReady(void)
{
    while (READ_PERI_REG(SPI_FLASH_CMD(HSPI)) & SPI_FLASH_USR) {};
}


static void hspi_writeFIFO(uint8_t *write_data, int bytes)
{
    uint8_t word_ind = 0;

    if(bytes > HSPI_FIFO_SIZE)                    // TODO set error status
        return;

    hspi_setBits(bytes);                          // Update FIFO with number of bits we will send

// First do a fast write with 32 bit chunks at a time
    while(bytes >= 4)
    {
// Cast both source and destination to 4 byte word pointers
        ((uint32_t *)SPI_FLASH_C0(HSPI)) [word_ind] = \
            ((uint32_t *)write_data) [word_ind];

        bytes -= 4;
        word_ind++;
    }

// Next write remaining bytes (if any) to FIFO as a single word
// Note: We follow the good practice of avoiding access past the end of an array.
//  (ie. protected memory, PIC using retw from flash ... could crash some CPU's)
    if(bytes)                                     // Valid counts are now: 3,2,1 bytes
    {
        uint32_t last_word = 0;                   // Last word to send
        uint16_t byte_ind = word_ind << 2;        // Convert to Byte index

// Working MSB to LSB allows assigment to LSB without shifting
// Compiler can optimize powers of 8 into byte swaps, etc... (on some CPU's)
        while(bytes--)                            // index is now 2,1,0 matching required storage offset
        {
            last_word <<= 8;
// 2,1,0
            last_word |= ((uint32_t) 0xffU & write_data[byte_ind + bytes ]);
        }
// Send last partial word
        ((uint32_t *)SPI_FLASH_C0(HSPI)) [word_ind] = last_word;
    }
}


static void hspi_readFIFO(uint8_t *read_data, int bytes)
{

    uint8_t word_ind = 0;

    if(bytes > HSPI_FIFO_SIZE)                    // TODO set error status
        return;

// Update FIFO with number of bits to read ?
    hspi_setBits(bytes);

// First do a fast read 32 bit chunks at a time
    while(bytes >= 4)
    {
// Cast both source and destination to 4 byte word pointers
        ((uint32_t *)read_data) [word_ind] = \
            ((uint32_t *)SPI_FLASH_C0(HSPI)) [word_ind];
        bytes -= 4;
        word_ind++;
    }

// Next read remaining bytes (if any) from FIFO as a single word
// Note: We follow the good practice of avoiding access past the end of an array.
//  (ie. protected memory, PIC using retw from flash ... could crash some CPU's)
    if(bytes)                                     // Valid counts are now: 3,2,1 bytes
    {
        uint32_t last_word = ((uint32_t *)SPI_FLASH_C0(HSPI)) [word_ind];
        uint16_t byte_ind = word_ind << 2;        // Convert to Byte index

        while(bytes--)                            // index is now 2,1,0 matching required storage offset
        {
// 2,1,0 order
            read_data[byte_ind++] = (uint8_t) 0xff & last_word;
            last_word >>= 8;
        }
// Send last partial word
    }
}





void hspi_TX(uint8_t *data, int count)
{
    int bytes;

    while(count > 0)
    {
        // we will never have zero - we already checked
        bytes = count;
        if(bytes > HSPI_FIFO_SIZE)
            bytes = HSPI_FIFO_SIZE;

        hspi_config(CONFIG_FOR_TX);   // Does hspi_waitReady(); first
        // clear buffer first
        hspi_writeFIFO(data, bytes);
        hspi_startSend();
        hspi_waitReady();

        data += bytes;
        count -= bytes;
    }
}


void hspi_TXRX(uint8_t *data, int count)
{
    int bytes;

    while(count > 0)
    {
        // we will never have zero - we already checked
        bytes = count;
        if(bytes > HSPI_FIFO_SIZE)
            bytes = HSPI_FIFO_SIZE;

        hspi_config(CONFIG_FOR_RX_TX);   // Does hspi_waitReady(); first
        hspi_writeFIFO(data, bytes);
        hspi_startSend();
        hspi_waitReady();
        hspi_readFIFO(data, bytes);

        data += bytes;
        count -= bytes;
    }
}

void hspi_RX(uint8_t *data, int count)
{
    int bytes;

    while(count > 0)
    {
        // we will never have zero - we already checked
        bytes = count;
        if(bytes > HSPI_FIFO_SIZE)
            bytes = HSPI_FIFO_SIZE;

        // discard TX data
        hspi_config(CONFIG_FOR_RX_TX);   
        // Writes are ignored, so we set data to 0xff
        memset(data, 0xff, bytes);
        hspi_writeFIFO(data, bytes);
        hspi_startSend();
        hspi_waitReady();
        // read result
        hspi_readFIFO(data, bytes);

        data += bytes;
        count -= bytes;
    }
}