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Macros | |
#define | signature_AMD_ebx 0x68747541 |
#define | signature_AMD_edx 0x69746e65 |
#define | signature_AMD_ecx 0x444d4163 |
#define | signature_CENTAUR_ebx 0x746e6543 |
#define | signature_CENTAUR_edx 0x48727561 |
#define | signature_CENTAUR_ecx 0x736c7561 |
#define | signature_CYRIX_ebx 0x69727943 |
#define | signature_CYRIX_edx 0x736e4978 |
#define | signature_CYRIX_ecx 0x64616574 |
#define | signature_INTEL_ebx 0x756e6547 |
#define | signature_INTEL_edx 0x49656e69 |
#define | signature_INTEL_ecx 0x6c65746e |
#define | signature_TM1_ebx 0x6e617254 |
#define | signature_TM1_edx 0x74656d73 |
#define | signature_TM1_ecx 0x55504361 |
#define | signature_TM2_ebx 0x756e6547 |
#define | signature_TM2_edx 0x54656e69 |
#define | signature_TM2_ecx 0x3638784d |
#define | signature_NSC_ebx 0x646f6547 |
#define | signature_NSC_edx 0x43534e20 |
#define | signature_NSC_ecx 0x79622065 |
#define | signature_NEXGEN_ebx 0x4778654e |
#define | signature_NEXGEN_edx 0x72446e65 |
#define | signature_NEXGEN_ecx 0x6e657669 |
#define | signature_RISE_ebx 0x65736952 |
#define | signature_RISE_edx 0x65736952 |
#define | signature_RISE_ecx 0x65736952 |
#define | signature_SIS_ebx 0x20536953 |
#define | signature_SIS_edx 0x20536953 |
#define | signature_SIS_ecx 0x20536953 |
#define | signature_UMC_ebx 0x20434d55 |
#define | signature_UMC_edx 0x20434d55 |
#define | signature_UMC_ecx 0x20434d55 |
#define | signature_VIA_ebx 0x20414956 |
#define | signature_VIA_edx 0x20414956 |
#define | signature_VIA_ecx 0x20414956 |
#define | signature_VORTEX_ebx 0x74726f56 |
#define | signature_VORTEX_edx 0x36387865 |
#define | signature_VORTEX_ecx 0x436f5320 |
#define | bit_SSE3 0x00000001 |
#define | bit_PCLMULQDQ 0x00000002 |
#define | bit_DTES64 0x00000004 |
#define | bit_MONITOR 0x00000008 |
#define | bit_DSCPL 0x00000010 |
#define | bit_VMX 0x00000020 |
#define | bit_SMX 0x00000040 |
#define | bit_EIST 0x00000080 |
#define | bit_TM2 0x00000100 |
#define | bit_SSSE3 0x00000200 |
#define | bit_CNXTID 0x00000400 |
#define | bit_FMA 0x00001000 |
#define | bit_CMPXCHG16B 0x00002000 |
#define | bit_xTPR 0x00004000 |
#define | bit_PDCM 0x00008000 |
#define | bit_PCID 0x00020000 |
#define | bit_DCA 0x00040000 |
#define | bit_SSE41 0x00080000 |
#define | bit_SSE42 0x00100000 |
#define | bit_x2APIC 0x00200000 |
#define | bit_MOVBE 0x00400000 |
#define | bit_POPCNT 0x00800000 |
#define | bit_TSCDeadline 0x01000000 |
#define | bit_AESNI 0x02000000 |
#define | bit_XSAVE 0x04000000 |
#define | bit_OSXSAVE 0x08000000 |
#define | bit_AVX 0x10000000 |
#define | bit_RDRND 0x40000000 |
#define | bit_FPU 0x00000001 |
#define | bit_VME 0x00000002 |
#define | bit_DE 0x00000004 |
#define | bit_PSE 0x00000008 |
#define | bit_TSC 0x00000010 |
#define | bit_MSR 0x00000020 |
#define | bit_PAE 0x00000040 |
#define | bit_MCE 0x00000080 |
#define | bit_CX8 0x00000100 |
#define | bit_APIC 0x00000200 |
#define | bit_SEP 0x00000800 |
#define | bit_MTRR 0x00001000 |
#define | bit_PGE 0x00002000 |
#define | bit_MCA 0x00004000 |
#define | bit_CMOV 0x00008000 |
#define | bit_PAT 0x00010000 |
#define | bit_PSE36 0x00020000 |
#define | bit_PSN 0x00040000 |
#define | bit_CLFSH 0x00080000 |
#define | bit_DS 0x00200000 |
#define | bit_ACPI 0x00400000 |
#define | bit_MMX 0x00800000 |
#define | bit_FXSR 0x01000000 |
#define | bit_FXSAVE bit_FXSR /* for gcc compat */ |
#define | bit_SSE 0x02000000 |
#define | bit_SSE2 0x04000000 |
#define | bit_SS 0x08000000 |
#define | bit_HTT 0x10000000 |
#define | bit_TM 0x20000000 |
#define | bit_PBE 0x80000000 |
#define | bit_FSGSBASE 0x00000001 |
#define | bit_SMEP 0x00000080 |
#define | bit_ENH_MOVSB 0x00000200 |
#define | __cpuid(__level, __eax, __ebx, __ecx, __edx) |
#define | __cpuid_count(__level, __count, __eax, __ebx, __ecx, __edx) |
#define __cpuid | ( | __level, | |
__eax, | |||
__ebx, | |||
__ecx, | |||
__edx | |||
) |
#define __cpuid_count | ( | __level, | |
__count, | |||
__eax, | |||
__ebx, | |||
__ecx, | |||
__edx | |||
) |
#define bit_ACPI 0x00400000 |
#define bit_AESNI 0x02000000 |
#define bit_APIC 0x00000200 |
#define bit_AVX 0x10000000 |
#define bit_CLFSH 0x00080000 |
#define bit_CMOV 0x00008000 |
#define bit_CMPXCHG16B 0x00002000 |
#define bit_CNXTID 0x00000400 |
#define bit_CX8 0x00000100 |
#define bit_DCA 0x00040000 |
#define bit_DE 0x00000004 |
#define bit_DS 0x00200000 |
#define bit_DSCPL 0x00000010 |
#define bit_DTES64 0x00000004 |
#define bit_EIST 0x00000080 |
#define bit_ENH_MOVSB 0x00000200 |
#define bit_FMA 0x00001000 |
#define bit_FPU 0x00000001 |
#define bit_FSGSBASE 0x00000001 |
#define bit_FXSAVE bit_FXSR /* for gcc compat */ |
#define bit_FXSR 0x01000000 |
#define bit_HTT 0x10000000 |
#define bit_MCA 0x00004000 |
#define bit_MCE 0x00000080 |
#define bit_MMX 0x00800000 |
#define bit_MONITOR 0x00000008 |
#define bit_MOVBE 0x00400000 |
#define bit_MSR 0x00000020 |
#define bit_MTRR 0x00001000 |
#define bit_OSXSAVE 0x08000000 |
#define bit_PAE 0x00000040 |
#define bit_PAT 0x00010000 |
#define bit_PBE 0x80000000 |
#define bit_PCID 0x00020000 |
#define bit_PCLMULQDQ 0x00000002 |
#define bit_PDCM 0x00008000 |
#define bit_PGE 0x00002000 |
#define bit_POPCNT 0x00800000 |
#define bit_PSE 0x00000008 |
#define bit_PSE36 0x00020000 |
#define bit_PSN 0x00040000 |
#define bit_RDRND 0x40000000 |
#define bit_SEP 0x00000800 |
#define bit_SMEP 0x00000080 |
#define bit_SMX 0x00000040 |
#define bit_SS 0x08000000 |
#define bit_SSE 0x02000000 |
#define bit_SSE2 0x04000000 |
#define bit_SSE3 0x00000001 |
#define bit_SSE41 0x00080000 |
#define bit_SSE42 0x00100000 |
#define bit_SSSE3 0x00000200 |
#define bit_TM 0x20000000 |
#define bit_TM2 0x00000100 |
#define bit_TSC 0x00000010 |
#define bit_TSCDeadline 0x01000000 |
#define bit_VME 0x00000002 |
#define bit_VMX 0x00000020 |
#define bit_x2APIC 0x00200000 |
#define bit_XSAVE 0x04000000 |
#define bit_xTPR 0x00004000 |
#define signature_AMD_ebx 0x68747541 |
#define signature_AMD_ecx 0x444d4163 |
#define signature_AMD_edx 0x69746e65 |
#define signature_CENTAUR_ebx 0x746e6543 |
#define signature_CENTAUR_ecx 0x736c7561 |
#define signature_CENTAUR_edx 0x48727561 |
#define signature_CYRIX_ebx 0x69727943 |
#define signature_CYRIX_ecx 0x64616574 |
#define signature_CYRIX_edx 0x736e4978 |
#define signature_INTEL_ebx 0x756e6547 |
#define signature_INTEL_ecx 0x6c65746e |
#define signature_INTEL_edx 0x49656e69 |
#define signature_NEXGEN_ebx 0x4778654e |
#define signature_NEXGEN_ecx 0x6e657669 |
#define signature_NEXGEN_edx 0x72446e65 |
#define signature_NSC_ebx 0x646f6547 |
#define signature_NSC_ecx 0x79622065 |
#define signature_NSC_edx 0x43534e20 |
#define signature_RISE_ebx 0x65736952 |
#define signature_RISE_ecx 0x65736952 |
#define signature_RISE_edx 0x65736952 |
#define signature_SIS_ebx 0x20536953 |
#define signature_SIS_ecx 0x20536953 |
#define signature_SIS_edx 0x20536953 |
#define signature_TM1_ebx 0x6e617254 |
#define signature_TM1_ecx 0x55504361 |
#define signature_TM1_edx 0x74656d73 |
#define signature_TM2_ebx 0x756e6547 |
#define signature_TM2_ecx 0x3638784d |
#define signature_TM2_edx 0x54656e69 |
#define signature_UMC_ebx 0x20434d55 |
#define signature_UMC_ecx 0x20434d55 |
#define signature_UMC_edx 0x20434d55 |
#define signature_VIA_ebx 0x20414956 |
#define signature_VIA_ecx 0x20414956 |
#define signature_VIA_edx 0x20414956 |
#define signature_VORTEX_ebx 0x74726f56 |
#define signature_VORTEX_ecx 0x436f5320 |
#define signature_VORTEX_edx 0x36387865 |