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sketchbook
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#include <byteswap.h>#include <stdio.h>#include <stdint.h>#include <wiringPi.h>#include <wiringPiI2C.h>#include "ads1115.h"Macros | |
| #define | CONFIG_OS_MASK (0x8000) |
| #define | CONFIG_OS_SINGLE (0x8000) |
| #define | CONFIG_MUX_MASK (0x7000) |
| #define | CONFIG_MUX_DIFF_0_1 (0x0000) |
| #define | CONFIG_MUX_DIFF_0_3 (0x1000) |
| #define | CONFIG_MUX_DIFF_1_3 (0x2000) |
| #define | CONFIG_MUX_DIFF_2_3 (0x3000) |
| #define | CONFIG_MUX_SINGLE_0 (0x4000) |
| #define | CONFIG_MUX_SINGLE_1 (0x5000) |
| #define | CONFIG_MUX_SINGLE_2 (0x6000) |
| #define | CONFIG_MUX_SINGLE_3 (0x7000) |
| #define | CONFIG_PGA_MASK (0x0E00) |
| #define | CONFIG_PGA_6_144V (0x0000) |
| #define | CONFIG_PGA_4_096V (0x0200) |
| #define | CONFIG_PGA_2_048V (0x0400) |
| #define | CONFIG_PGA_1_024V (0x0600) |
| #define | CONFIG_PGA_0_512V (0x0800) |
| #define | CONFIG_PGA_0_256V (0x0A00) |
| #define | CONFIG_MODE (0x0100) |
| #define | CONFIG_DR_MASK (0x00E0) |
| #define | CONFIG_DR_8SPS (0x0000) |
| #define | CONFIG_DR_16SPS (0x0020) |
| #define | CONFIG_DR_32SPS (0x0040) |
| #define | CONFIG_DR_64SPS (0x0060) |
| #define | CONFIG_DR_128SPS (0x0080) |
| #define | CONFIG_DR_475SPS (0x00A0) |
| #define | CONFIG_DR_860SPS (0x00C0) |
| #define | CONFIG_CMODE_MASK (0x0010) |
| #define | CONFIG_CMODE_TRAD (0x0000) |
| #define | CONFIG_CMODE_WINDOW (0x0010) |
| #define | CONFIG_CPOL_MASK (0x0008) |
| #define | CONFIG_CPOL_ACTVLOW (0x0000) |
| #define | CONFIG_CPOL_ACTVHI (0x0008) |
| #define | CONFIG_CLAT_MASK (0x0004) |
| #define | CONFIG_CLAT_NONLAT (0x0000) |
| #define | CONFIG_CLAT_LATCH (0x0004) |
| #define | CONFIG_CQUE_MASK (0x0003) |
| #define | CONFIG_CQUE_1CONV (0x0000) |
| #define | CONFIG_CQUE_2CONV (0x0001) |
| #define | CONFIG_CQUE_4CONV (0x0002) |
| #define | CONFIG_CQUE_NONE (0x0003) |
| #define | CONFIG_DEFAULT (0x8583) |
Functions | |
| int | ads1115Setup (const int pinBase, int i2cAddr) |
| #define CONFIG_CLAT_LATCH (0x0004) |
| #define CONFIG_CLAT_MASK (0x0004) |
| #define CONFIG_CLAT_NONLAT (0x0000) |
| #define CONFIG_CMODE_MASK (0x0010) |
| #define CONFIG_CMODE_TRAD (0x0000) |
| #define CONFIG_CMODE_WINDOW (0x0010) |
| #define CONFIG_CPOL_ACTVHI (0x0008) |
| #define CONFIG_CPOL_ACTVLOW (0x0000) |
| #define CONFIG_CPOL_MASK (0x0008) |
| #define CONFIG_CQUE_1CONV (0x0000) |
| #define CONFIG_CQUE_2CONV (0x0001) |
| #define CONFIG_CQUE_4CONV (0x0002) |
| #define CONFIG_CQUE_MASK (0x0003) |
| #define CONFIG_CQUE_NONE (0x0003) |
| #define CONFIG_DEFAULT (0x8583) |
| #define CONFIG_DR_128SPS (0x0080) |
| #define CONFIG_DR_16SPS (0x0020) |
| #define CONFIG_DR_32SPS (0x0040) |
| #define CONFIG_DR_475SPS (0x00A0) |
| #define CONFIG_DR_64SPS (0x0060) |
| #define CONFIG_DR_860SPS (0x00C0) |
| #define CONFIG_DR_8SPS (0x0000) |
| #define CONFIG_DR_MASK (0x00E0) |
| #define CONFIG_MODE (0x0100) |
| #define CONFIG_MUX_DIFF_0_1 (0x0000) |
| #define CONFIG_MUX_DIFF_0_3 (0x1000) |
| #define CONFIG_MUX_DIFF_1_3 (0x2000) |
| #define CONFIG_MUX_DIFF_2_3 (0x3000) |
| #define CONFIG_MUX_MASK (0x7000) |
| #define CONFIG_MUX_SINGLE_0 (0x4000) |
| #define CONFIG_MUX_SINGLE_1 (0x5000) |
| #define CONFIG_MUX_SINGLE_2 (0x6000) |
| #define CONFIG_MUX_SINGLE_3 (0x7000) |
| #define CONFIG_OS_MASK (0x8000) |
| #define CONFIG_OS_SINGLE (0x8000) |
| #define CONFIG_PGA_0_256V (0x0A00) |
| #define CONFIG_PGA_0_512V (0x0800) |
| #define CONFIG_PGA_1_024V (0x0600) |
| #define CONFIG_PGA_2_048V (0x0400) |
| #define CONFIG_PGA_4_096V (0x0200) |
| #define CONFIG_PGA_6_144V (0x0000) |
| #define CONFIG_PGA_MASK (0x0E00) |
| int ads1115Setup | ( | const int | pinBase, |
| int | i2cAddr | ||
| ) |
1.8.6