source code

Please type your program or select an example.

Examples:

    Source

    Instruction set

    • Arithmetic

          OP1, OP2 := Register or Immediate value.
          DST := Register.
      • ADD OP1, OP2, DST
      • SUB OP1, OP2, DST
      • MUL OP1, OP2, DST
      • DIV OP1, OP2, DST

    • Flow control

          ADDR:= Instruction address (row #).
      • JMP ADDR
      • JZ  ADDR
      • JNZ ADDR

    • Memory interface

          REG := Register
          VAL, ADDR := Register or Immediate value.
      • LDR ADDR, REG
            Page size := 1.
      • STR VAL, ADDR

    • Extra

      • ; comment
    load
    configuration
    Register File
    registers #
    Functional Units
    adders # latency
    multipliers # latency
    divider # latency
    Memory
    read latency
    write latency
    Cache
    algorithm
    N (ways) size
    read latency write latency
    Pipeline
    issue-exec delay
    exec-write delay
    ROB (0 = disabled)size
    Branch Predictor
    kind
    N (bits)
    K (size)
    apply
    execution
    0   0
    Source Code
    # Instruction
    Execution
    # Instruction Issue Exec Write Commit
    Reservation Stations
    Name Busy Op Vj Vk Qj Qk tag due